It has been five years since ETH Zurich in Switzerland and the University of Bologna in Italy started their joint PULP research project on the energy efficiency of microprocessor architectures. The project is fully based on open-source hardware and software, and has resulted in the tape-out of two dozen implementations.
"The real freedom you get from open source projects is much more, and more important than the fact that you don't have to pay for it," Frank Gürkaynak, Director of ETHZ's Microelectronics Design Center, writes in an article posted on All About Circuits. "Researchers can take what we provide and freely change it for their experiments. Startup companies can build on what we provide as a starting point and concentrate their time and energy on the actual innovations they want to provide. And people who are disturbed by various attacks on their systems [1, 2] have the chance to look inside and know what exactly is in their system."
Open-source processor cores
At the start of their project, the PULP team investigated available commercial processors. According to Gürkaynak, most processor IP providers had university programmes with reasonable conditions, but most of these programmes would not allow the researchers to make changes to the architecture, and some would need additional licenses for manufacturing actual chips. "Most importantly any collaboration we wanted to establish with new partners both from the industry and academia would require additional agreements to be signed that took quite a long time to set up." So the PULP project turned to open-source processor cores instead.
In the first years, the project built on the OpenRISC processor archirecture, the flagship of the OpenCores community. It is supported by the GNU toolchain (i.e. gcc, gdb, make, bison/flex, and autotools), the Linux kernel, and several real-time operating systems (RTOSes).
Three years ago, the project team decided to migrate to RISC-V, a more recent open architecture. It is maintained by the RISC-V foundation, of which ETHZ is a founding member. The main reason for this choice was RISC-V's fast-growing popularity and the support in Linux, FreeBSD and NetBSD. OSH developers have the support of the Chisel design compiler (from Verilog specifications into actual chips), the GNU toolchain, the LLVM toolchain (to create compilers), and various emulators.
Naveed Sherwani, the CEO of semiconductor company SiFive, recently talked about the democratisation of silicon. According to EE Times, he expects China and India to drive the large-scale adoption of RISC-V over the coming years.