Barcelona’s Supercomputing Centre (BSC) is testing its first batch of 100 open source chips based on the RISC-V computer instruction set architecture. The centre aims to build open source CPUs that can be used for high-performance computing and Internet of Things applications, as well as for academic research projects. “The European RISC-V ecosystem is growing fast,” says Miquel Moretó, one of the RISC-V researchers at BSC.
Barcelona’s Lagarto design was presented in May at the Europractice platform for microelectronics and electronic system design. The research institute is “firmly committed to the development of a processor ‘made in Europe’,” an article by the BSC quotes director Mateo Valero as saying.
The article continues:
“Lagarto is an important step in the ambition of the BSC, led by the center's director, Mateo Valero, to develop European computing technology. This project is based on the premise that the instruction repertoire of future processors must be open source to ensure transparency and minimize dependence.”
The BSC RISC-V (“risk-five”) chips and circuit boards, codenamed Lagarto (“lizard”), are the result of a two-year project involving 30 researchers from BSC, the IPN Computer Research Center in Mexico City, and the Centro Nacional de Microelectrónica and the Polytechnic University of Catalonia, both in Barcelona.
The BSC is also involved in the European Processor Initiative, involving in total 27 academic research organisations and companies. Here it is working on alternative RISC-V designs such as Pulp and Ariane, which are jointly developed by the Swiss Federal Institute of Technology in Zurich and the University of Bologna, Italy.
European companies involved in RISC-V include Cortus, headquartered in France, Sweden’s Cobham, and NXP in the Netherlands. “Many other companies are working on RISC-V designs, focused on a wide range of applications. There are many exciting projects going on,” researcher Moretó told the European Commission’s Open Source Observatory.